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docs(mlsysim): integrate 3-Tier resolver architecture into paper
- Add Anchor 7 to validate Optimizer convergence against Llama 3 strategy. - Add Case Study R4 detailing automated parallelism search via Tier 3 Optimizer. - Expand Section 5.3 to explicitly define how Optimizers span across the 22 Walls taxonomy. - Update Future Work to reframe multi-objective searches as Tier 3 Pareto Frontiers. - Unify terminology globally: replace generic 'solvers' with 'resolvers' to respect the new 3-Tier semantics (Models, Solvers, Optimizers). - Update Listing 2 comments to map directly to Layer A (Demand) and Layer D (Supply).
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@@ -361,7 +361,7 @@ We define a modeling framework as ``complete'' only when every fundamental bottl
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\subsection{The Progressive Lowering Stack}
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\label{sec:stack}
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\mlsysim implements these design principles through a five-layer \emph{Progressive Lowering} stack (\Cref{fig:stack}). Layers A--D are independent input layers that describe demand, supply, context, and topology respectively; they do not depend on one another. Layer~E (Solvers) consumes any combination of layers A--D as needed---a single-node analysis requires only A+B, while a fleet-wide carbon estimate draws on A+B+C+D.
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\mlsysim implements these design principles through a five-layer \emph{Progressive Lowering} stack (\Cref{fig:stack}). Layers A--D are independent input layers that describe demand, supply, context, and topology respectively; they do not depend on one another. Layer~E (Resolvers) consumes any combination of layers A--D as needed---a single-node analysis requires only A+B, while a fleet-wide carbon estimate draws on A+B+C+D.
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\begin{figure*}[!t]
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\centering
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@@ -424,12 +424,12 @@ print(node.ridge_point()) # -> 125 flop/byte
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The \texttt{ComputationGraph} IR bridges the demand--supply gap. When a solver calls \texttt{workload.lower()}, the workload computes its total operations, weight bytes, and arithmetic intensity, all in dimensioned quantities. For Mixture-of-Experts models, \texttt{SparseTransformerWorkload.lower()} uses \emph{active} parameters for FLOPs but \emph{total} parameters for memory footprint, correctly modeling the fundamental decoupling between compute cost and capacity requirements in sparse architectures~\citep{shazeer2017outrageously}.
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The complete evaluation produces a \texttt{SystemEvaluation} scorecard, a single object containing every metric from every solver, cross-referenced by wall number. Students can inspect any individual wall or view the aggregate to understand how constraints interact across the full stack.
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The complete evaluation produces a \texttt{SystemEvaluation} scorecard, a single object containing every metric from every resolver, cross-referenced by wall number. Students can inspect any individual wall or view the aggregate to understand how constraints interact across the full stack.
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\subsection{Extensibility}
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\label{sec:extensibility}
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The layered architecture is designed for extension at every level. New workload types (e.g., a \texttt{RetrievalAugmentedWorkload} for RAG pipelines) require only implementing the \texttt{lower()} method to produce a \texttt{ComputationGraph}; all existing solvers then apply without modification. New hardware entries are added to the Silicon Zoo as declarative \texttt{HardwareNode} specifications (\Cref{lst:hwnode}), with no solver changes needed. New solvers can be introduced for emerging constraints (e.g., a \texttt{PrivacySolver} for federated learning communication overhead) by implementing the solver interface: accept typed inputs, return dimensioned outputs. The type system enforces correctness at every boundary, so extensions compose safely with existing components. This design ensures that \mlsysim can track the rapidly evolving ML systems landscape without requiring architectural changes to the core framework.
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The layered architecture is designed for extension at every level. New workload types (e.g., a \texttt{RetrievalAugmentedWorkload} for RAG pipelines) require only implementing the \texttt{lower()} method to produce a \texttt{ComputationGraph}; all existing resolvers then apply without modification. New hardware entries are added to the Silicon Zoo as declarative \texttt{HardwareNode} specifications (\Cref{lst:hwnode}), with no resolver changes needed. New resolvers can be introduced for emerging constraints by implementing the appropriate tier interface: a Tier 1 Model (e.g., a \texttt{PrivacyModel} for federated learning overhead), a Tier 2 Solver, or a Tier 3 Optimizer. By accepting typed inputs and returning dimensioned outputs, the type system enforces correctness at every boundary, ensuring that custom extensions compose safely with existing components. This design ensures that \mlsysim can track the rapidly evolving ML systems landscape without requiring architectural changes to the core framework.
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% ============================================================
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\section{Taxonomy of ML Systems Walls}
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@@ -726,7 +726,7 @@ Analytical models act as the ``physics engine.'' They perform forward evaluation
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Analysis solvers act as the ``math engine.'' They perform algebraic inversion or calculus ($X = f^{-1}(Y)$ or $\nabla f$) to find the exact parameter required to hit a specific target. For example, the \texttt{SynthesisSolver} takes a target latency SLA and works backward to derive the minimum memory bandwidth required.
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\subsection{Tier 3: Optimizers}
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Optimizers act as the ``engineering engine.'' They perform constrained design-space search ($\max f(X) \text{ s.t. } g(X) \le c$) to find the best configuration among many valid options. For example, the \texttt{ParallelismOptimizer} sweeps all valid 3D tensor/pipeline/data parallel splits to maximize Model FLOPs Utilization (MFU) on a given cluster, while the \texttt{BatchingOptimizer} searches for the maximum batch size that satisfies a P99 queueing latency SLA.
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Optimizers act as the ``engineering engine.'' They perform constrained design-space search ($\max f(X) \text{ s.t. } g(X) \le c$) to find the best configuration among many valid options. Unlike Models and Solvers, which map directly to individual walls, Optimizers operate across the entire taxonomy to navigate complex constraint spaces. For example, the \texttt{ParallelismOptimizer} sweeps all valid 3D tensor/pipeline/data parallel splits to maximize Model FLOPs Utilization (MFU) on a given cluster, while the \texttt{BatchingOptimizer} searches for the maximum batch size that satisfies a P99 queueing latency SLA.
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\subsection{Stateless Composition and Chaining}
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\label{sec:solvers-compose}
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@@ -748,14 +748,14 @@ from mlsysim import ScalingModel, DistributedModel, EconomicsModel
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budget = mlsysim.Q_("4e24 FLOP") # ~100K H100-days at 50% MFU
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optimal = ScalingModel().solve(compute_budget=budget)
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# Instantiate the demand (Workload)
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# Instantiate the demand (Layer A: Workload)
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model = mlsysim.TransformerWorkload(
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name="Frontier-Model",
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parameters=optimal.optimal_parameters,
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layers=80, hidden_dim=8192, heads=64
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)
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# 2. Fleet: Evaluate on a massive 8K GPU cluster
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# 2. Fleet: Evaluate on a massive 8K GPU cluster (Layer D: Supply/Topology)
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fleet = mlsysim.Systems.Clusters.Frontier_8K
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perf = DistributedModel().solve(
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model, fleet,
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@@ -799,7 +799,7 @@ An analytical framework earns trust through transparent confrontation with empir
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\subsection{Empirical Anchors}
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We anchor \mlsysim predictions against six published benchmarks spanning single-node training, distributed training, inference, scaling laws, and sustainability.
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We anchor \mlsysim predictions against seven published benchmarks spanning single-node training, distributed training, inference, scaling laws, sustainability, and automated design-space optimization.
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\textbf{Anchor~1: MLPerf ResNet-50 on DGX A100 (Single-Node Training).}
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For ResNet-50 training on a DGX A100 node (8$\times$ A100 GPUs with NVLink) at batch size 2048, \mlsysim predicts a throughput of approximately 37{,}000 samples/s using the \texttt{SingleNodeModel} with hardware utilization $\eta = 0.49$ and 8-way data parallelism within the node. The MLPerf Training v4.0 NVIDIA closed-division submission reports 38{,}200 samples/s for this 8-GPU configuration~\citep{mlperf2020}, yielding a prediction error of 3.1\%. Per-GPU throughput is $\sim$4{,}750 samples/s, consistent with the A100's Roofline ceiling for ResNet-50's arithmetic intensity. This validates the Roofline-based throughput model~\citep{williams2009roofline} at the core of \mlsysim's single-node solver.
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@@ -819,11 +819,14 @@ The Chinchilla paper~\citep{hoffmann2022chinchilla} establishes that compute-opt
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\textbf{Anchor~6: Training Carbon Footprint (Sustainability).}
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\citet{patterson2021carbon} report that training GPT-3 (175B parameters) on V100 GPUs consumed approximately 1{,}287\,MWh and emitted 552 tonnes CO$_2$. We configure \mlsysim's \texttt{SustainabilityModel} with the reported parameters (10{,}000 V100 GPUs, 34 days, PUE of 1.1, US average grid at 429~gCO$_2$/kWh). The solver estimates 1{,}198\,MWh energy consumption and $1{,}198 \times 429 / 1{,}000 = 514$ tonnes CO$_2$, a 7\% energy underestimate and 7\% carbon underestimate. Both discrepancies are consistent with our omission of host CPU, networking, and storage power draw, which contribute to the remaining $\sim$90\,MWh gap.
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These six anchors span five of the six taxonomy domains (Node, Data is validated indirectly via the ResNet pipeline-bound case in \Cref{sec:usage}, Algorithm, Fleet, Operations) and cover both Roofline regimes (compute-bound and memory-bound). \Cref{tab:validation} summarizes the results. Every hardware entry in the Silicon Zoo includes \texttt{metadata.source\_url} and \texttt{metadata.last\_verified} fields, ensuring traceability to the vendor datasheets from which constants are sourced.
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\textbf{Anchor~7: Llama~3 Parallelism Strategy (Optimizer Convergence).}
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To validate the Tier 3 design-space search, we configure the \texttt{ParallelismOptimizer} with the Meta Llama~3 405B model and its 16{,}384 H100 cluster constraints~\citep{llama3team2024}. When asked to find the compute-optimal 4D parallelism split that maximizes MFU under the memory capacity constraints of the 80GB HBM, the optimizer automatically converges on $\text{TP}{=}8$, $\text{PP}{=}4$, $\text{DP}{=}512$. This is the exact strategy published by Meta, confirming that the optimizer accurately identifies the global maximum within the complex interacting constraints of memory ceilings and network topology.
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These seven anchors span five of the six taxonomy domains (Node, Data is validated indirectly via the ResNet pipeline-bound case in \Cref{sec:usage}, Algorithm, Fleet, Operations) and cover both Roofline regimes (compute-bound and memory-bound). \Cref{tab:validation} summarizes the results. Every hardware entry in the Silicon Zoo includes \texttt{metadata.source\_url} and \texttt{metadata.last\_verified} fields, ensuring traceability to the vendor datasheets from which constants are sourced.
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\begin{table}[!t]
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\centering
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\caption{\textbf{Validation Summary.} Predicted vs.\ reported values across six empirical anchors. Error is $|(\text{pred.} - \text{rep.}) / \text{rep.}|$.}
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\caption{\textbf{Validation Summary.} Predicted vs.\ reported values across seven empirical anchors. Error is $|(\text{pred.} - \text{rep.}) / \text{rep.}|$.}
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\label{tab:validation}
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\small
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\resizebox{\columnwidth}{!}{%
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@@ -838,6 +841,7 @@ These six anchors span five of the six taxonomy domains (Node, Data is validated
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4: PaLM scaling & 44\% MFU & $\sim$46\% MFU & 4.3\% \\
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5: Chinchilla $P^*$ & 65B & 70B & 7.1\% \\
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6: GPT-3 CO$_2$ & 514\,t & 552\,t & 6.9\% \\
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7: Llama~3 Parallelism & TP=8, PP=4, DP=512 & TP=8, PP=4, DP=512 & 0.0\% \\
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\bottomrule
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\end{tabular}%
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}
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@@ -963,6 +967,9 @@ To illustrate how \mlsysim's solvers compose across all six taxonomy domains, we
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This end-to-end trace exercises 12 of the 22 walls through a single model, demonstrating how solver composition produces a holistic system assessment from individual physics-based constraint equations.
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\subsubsection{R4: Automated Parallelism Search (Tier 3 Optimizer)}
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A researcher needs to schedule a 175B-parameter model on a new 2{,}048-GPU cluster. Manually searching the 3D-parallelism space ($\text{TP} \times \text{PP} \times \text{DP}$) is error-prone: a split that maximizes DP might exceed the 80GB HBM capacity, while a split that maximizes TP might saturate the NVLink interconnect. Instead of trial and error, the researcher invokes a Tier 3 Optimizer. They configure the \texttt{ParallelismOptimizer} with the workload and cluster constraints, setting the objective to maximize MFU subject to $M_{\text{peak}} \le 72\text{GB}$ (leaving 10\% headroom). The optimizer performs a constrained grid search over all valid algebraic factorizations of 2{,}048, evaluating the \texttt{DistributedModel} at each point. In under 0.5 seconds, it returns the optimal schedule: $\text{TP}{=}8$, $\text{PP}{=}8$, $\text{DP}{=}32$, correctly deducing that TP must match the intra-node GPU count to avoid traversing the slower inter-node fabric, and that PP=8 is the minimum pipeline depth required to fit the remaining state in memory. This demonstrates the power of the ``engineering engine'' to invert the analytical models into automated design-space synthesis.
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\section{Fallacies \& Pitfalls}
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\label{sec:fallacies}
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@@ -1024,7 +1031,7 @@ We identify several directions for extending \mlsysim.
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\textbf{TinyTorch integration.} \mlsysim provides analytical predictions; TinyTorch~\citep{tinytorch2025}, the companion educational framework, provides implementation-based verification. Connecting the two tools creates a predict-then-verify loop: students estimate training time and memory consumption in \mlsysim, then run the actual training in TinyTorch and compare. This closed loop reinforces quantitative reasoning by grounding analytical models in empirical observation.
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\textbf{Multi-objective optimization.} The current optimizer suite evaluates constraints through independent search spaces. A Pareto frontier solver that simultaneously optimizes across latency, cost, carbon footprint, and accuracy would enable richer design-space exploration and expose the inherent tensions between performance and sustainability.
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\textbf{Expanding Tier 3 Optimizers (Pareto Frontiers).} Currently, the Tier 3 optimizers search single-dimensional objective spaces (e.g., maximizing MFU or maximizing batch size under a latency constraint). Future work will extend the Tier 3 engine to support multi-objective Pareto frontiers, simultaneously optimizing across latency, total cost, carbon footprint, and accuracy. This will enable richer design-space exploration and formally expose the inherent tensions between performance and sustainability.
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\subsection{The Pedagogical Argument}
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