Files
cs249r_book/mlsysim/docs/api/core.solver.SynthesisSolver.qmd
Vijay Janapa Reddi d594b4abd0 docs(mlsysim): expand to 22-wall taxonomy with paper rewrite and overview figure
Expand walls.py from 17 to 22 walls, adding Serving (4), Batching (5),
Streaming (6), Tail Latency (7), and Checkpoint (19). Update paper.tex
with rewritten abstract, concrete LLaMA-3 motivating example, competitive
positioning against Calculon/ASTRA-sim/Vidur, and new overview figure.
Rebrand docs and tutorials to match.
2026-03-12 16:04:50 -04:00

15 lines
493 B
Plaintext

# core.solver.SynthesisSolver { #mlsysim.core.solver.SynthesisSolver }
```python
core.solver.SynthesisSolver()
```
The 'Architect's Solver' — synthesizes ideal hardware for a model.
This solver performs the 'Inverse Solve': given a workload and an SLA,
what are the required memory bandwidth and peak compute specs?
Literature Source:
1. Jouppi et al. (2017), "In-Datacenter Performance Analysis of a TPU."
2. Horowitz (2014), "Computing's Energy Problem (and what we can do about it)."