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https://github.com/MLSysBook/TinyTorch.git
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Add ML systems content to Module 13 (Kernels) - 70% implementation
- Added KernelOptimizationProfiler class with CUDA performance analysis - Implemented memory coalescing and warp divergence analysis - Added tensor core utilization and kernel fusion detection - Included multi-GPU scaling patterns and optimization - Added comprehensive ML systems thinking questions
This commit is contained in:
Vijay Janapa Reddi
@@ -1324,6 +1324,458 @@ def final_performance_test():
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# Run the final test
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final_performance_test()
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# %% [markdown]
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"""
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## Step 7: ML Systems - Production Kernel Optimization Profiler
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### GPU Architecture and Custom Kernels in Production ML
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In production ML systems, kernel optimization becomes critical for performance and cost efficiency. Modern ML frameworks rely on thousands of specialized kernels that are optimized for specific hardware architectures and use cases.
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### The Production Reality
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Real ML deployments face:
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- **Inference latency**: Sub-millisecond requirements for real-time applications
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- **Throughput demands**: Processing millions of requests per second
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- **Hardware diversity**: CPUs, GPUs, TPUs, custom ASICs
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- **Memory constraints**: Limited bandwidth and capacity
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- **Energy efficiency**: Power consumption in data centers and edge devices
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### GPU Kernel Optimization Patterns
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Modern GPUs require specialized optimization techniques:
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- **Memory coalescing**: Optimizing memory access patterns for GPU memory hierarchy
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- **Warp divergence analysis**: Ensuring efficient execution across GPU thread warps
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- **Shared memory optimization**: Leveraging fast on-chip memory for data reuse
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- **Tensor core utilization**: Maximizing mixed-precision compute throughput
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- **Kernel fusion**: Combining multiple operations to reduce memory overhead
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- **Multi-GPU scaling**: Coordinating computation across multiple devices
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### Real-World Context
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- **NVIDIA cuDNN**: Thousands of optimized GPU kernels for deep learning
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- **Intel oneDNN**: CPU-optimized kernels for inference
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- **Triton**: Python-like language for writing GPU kernels
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- **TensorRT**: Runtime optimization for NVIDIA GPUs
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- **Custom silicon**: TPUs, AWS Inferentia, Apple Neural Engine
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"""
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# %% nbgrader={"grade": false, "grade_id": "kernel-optimization-profiler", "locked": false, "schema_version": 3, "solution": true, "task": false}
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#| export
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class KernelOptimizationProfiler:
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"""
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Production-grade kernel optimization profiler for ML systems.
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This class provides comprehensive analysis tools for optimizing ML kernels
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across different hardware architectures, focusing on GPU optimization patterns
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and production deployment scenarios.
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Key Features:
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- CUDA kernel performance analysis
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- Memory coalescing pattern detection
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- Warp divergence analysis
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- Shared memory optimization
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- Tensor core utilization metrics
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- Kernel fusion opportunities
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- Multi-GPU scaling analysis
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"""
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def __init__(self, hardware_config: Optional[Dict[str, Any]] = None):
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"""
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Initialize the kernel optimization profiler.
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Args:
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hardware_config: Dictionary containing hardware specifications
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"""
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self.hardware_config = hardware_config or self._detect_hardware()
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self.profile_results = {}
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self.optimization_recommendations = []
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def _detect_hardware(self) -> Dict[str, Any]:
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"""Detect current hardware configuration."""
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return {
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'cpu_cores': psutil.cpu_count(),
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'memory_gb': psutil.virtual_memory().total // (1024**3),
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'cache_sizes': {
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'l1': 32768, # Typical L1 cache size in bytes
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'l2': 262144, # Typical L2 cache size in bytes
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'l3': 8388608 # Typical L3 cache size in bytes
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},
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'gpu_available': False, # Would check for CUDA/OpenCL in real implementation
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'gpu_memory_gb': 0,
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'tensor_cores': False,
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'warp_size': 32 # NVIDIA GPU warp size
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}
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def analyze_cuda_kernel_performance(self, kernel_func: Callable, input_data: Tensor,
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iterations: int = 100) -> Dict[str, Any]:
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"""
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Analyze CUDA kernel performance characteristics.
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In a real implementation, this would interface with CUDA profiling tools
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to measure actual GPU kernel performance metrics.
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"""
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# Simulate CUDA kernel analysis
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total_time = 0
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memory_bandwidth = 0
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compute_utilization = 0
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for _ in range(iterations):
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result, execution_time = time_kernel(kernel_func, input_data)
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total_time += execution_time
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# Simulate GPU metrics calculation
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data_size = input_data.data.nbytes
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memory_bandwidth += (data_size * 2) / (execution_time / 1_000_000) # Read + Write
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compute_utilization += np.random.uniform(0.3, 0.9) # Simulated utilization
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avg_time = total_time / iterations
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avg_bandwidth = memory_bandwidth / iterations
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avg_utilization = compute_utilization / iterations
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analysis = {
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'avg_execution_time_us': avg_time,
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'memory_bandwidth_gb_s': avg_bandwidth / (1024**3),
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'compute_utilization': avg_utilization,
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'theoretical_peak_bandwidth': 900, # GB/s for high-end GPU
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'bandwidth_efficiency': min(100, (avg_bandwidth / (1024**3)) / 900 * 100),
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'bottleneck_analysis': self._identify_bottlenecks(avg_bandwidth / (1024**3), avg_utilization)
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}
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self.profile_results['cuda_analysis'] = analysis
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return analysis
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def analyze_memory_coalescing(self, access_pattern: str, data_shape: Tuple[int, ...]) -> Dict[str, Any]:
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"""
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Analyze memory access patterns for GPU coalescing efficiency.
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Memory coalescing is critical for GPU performance - threads in a warp
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should access contiguous memory locations.
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"""
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coalescing_efficiency = 1.0
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if access_pattern == 'row_major':
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# Good coalescing for row-major access
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coalescing_efficiency = 0.95
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elif access_pattern == 'column_major':
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# Poor coalescing for column-major access
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coalescing_efficiency = 0.3
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elif access_pattern == 'strided':
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# Moderate coalescing for strided access
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stride = data_shape[1] if len(data_shape) > 1 else 1
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coalescing_efficiency = max(0.1, 1.0 / stride)
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elif access_pattern == 'random':
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# Very poor coalescing for random access
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coalescing_efficiency = 0.1
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analysis = {
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'access_pattern': access_pattern,
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'data_shape': data_shape,
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'coalescing_efficiency': coalescing_efficiency,
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'memory_transactions': self._calculate_memory_transactions(data_shape, coalescing_efficiency),
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'optimization_potential': 1.0 - coalescing_efficiency
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}
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self.profile_results['memory_coalescing'] = analysis
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return analysis
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def analyze_warp_divergence(self, conditional_operations: int, total_operations: int) -> Dict[str, Any]:
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"""
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Analyze warp divergence patterns in kernel execution.
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Warp divergence occurs when threads in a warp take different execution paths,
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reducing parallelism efficiency.
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"""
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divergence_ratio = conditional_operations / total_operations
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efficiency_loss = divergence_ratio * 0.5 # Simplified model
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analysis = {
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'conditional_operations': conditional_operations,
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'total_operations': total_operations,
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'divergence_ratio': divergence_ratio,
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'efficiency_loss': efficiency_loss,
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'warp_efficiency': 1.0 - efficiency_loss,
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'optimization_suggestions': self._generate_divergence_optimizations(divergence_ratio)
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}
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self.profile_results['warp_divergence'] = analysis
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return analysis
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def analyze_shared_memory_usage(self, kernel_data_size: int, reuse_factor: float) -> Dict[str, Any]:
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"""
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Analyze shared memory optimization opportunities.
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Shared memory is fast on-chip memory that can dramatically improve
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performance when used effectively for data reuse.
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"""
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shared_memory_size = 48 * 1024 # 48KB typical shared memory per SM
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bank_conflicts = self._estimate_bank_conflicts(kernel_data_size)
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analysis = {
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'data_size_bytes': kernel_data_size,
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'shared_memory_available': shared_memory_size,
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'utilization_ratio': min(1.0, kernel_data_size / shared_memory_size),
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'reuse_factor': reuse_factor,
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'bank_conflicts': bank_conflicts,
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'performance_gain': min(10.0, reuse_factor * (1.0 - bank_conflicts)),
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'optimization_opportunities': self._identify_shared_memory_optimizations(kernel_data_size, reuse_factor)
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}
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self.profile_results['shared_memory'] = analysis
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return analysis
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def analyze_tensor_core_utilization(self, operation_type: str, data_types: List[str]) -> Dict[str, Any]:
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"""
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Analyze tensor core utilization for mixed-precision operations.
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Tensor cores provide massive acceleration for mixed-precision matrix operations
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when data shapes and types are optimized correctly.
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"""
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tensor_core_compatible = (
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operation_type in ['matmul', 'conv2d'] and
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any(dtype in ['float16', 'bfloat16', 'int8'] for dtype in data_types)
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)
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if tensor_core_compatible:
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theoretical_speedup = 4.0 # Typical tensor core speedup
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actual_utilization = 0.7 # Realistic utilization
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else:
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theoretical_speedup = 1.0
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actual_utilization = 0.0
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analysis = {
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'operation_type': operation_type,
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'data_types': data_types,
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'tensor_core_compatible': tensor_core_compatible,
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'theoretical_speedup': theoretical_speedup,
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'actual_utilization': actual_utilization,
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'performance_gain': theoretical_speedup * actual_utilization,
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'optimization_requirements': self._get_tensor_core_requirements()
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}
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self.profile_results['tensor_core'] = analysis
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return analysis
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def analyze_kernel_fusion_opportunities(self, operation_sequence: List[str]) -> Dict[str, Any]:
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"""
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Analyze opportunities for kernel fusion to reduce memory overhead.
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Kernel fusion combines multiple operations into a single kernel,
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reducing memory bandwidth requirements and improving performance.
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"""
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fusable_patterns = [
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['matmul', 'relu'],
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['conv2d', 'batchnorm', 'relu'],
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['add', 'relu'],
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['mul', 'add']
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]
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fusion_opportunities = []
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memory_savings = 0
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for pattern in fusable_patterns:
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if self._sequence_contains_pattern(operation_sequence, pattern):
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fusion_opportunities.append(pattern)
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memory_savings += len(pattern) - 1 # Save intermediate results
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analysis = {
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'operation_sequence': operation_sequence,
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'fusion_opportunities': fusion_opportunities,
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'memory_savings_factor': memory_savings,
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'performance_improvement': min(2.0, 1 + memory_savings * 0.3),
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'implementation_complexity': len(fusion_opportunities) * 2
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}
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self.profile_results['kernel_fusion'] = analysis
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return analysis
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def analyze_multi_gpu_scaling(self, data_size: int, num_gpus: int) -> Dict[str, Any]:
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"""
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Analyze multi-GPU scaling patterns and communication overhead.
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Multi-GPU deployments require careful optimization of data distribution
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and communication patterns to achieve good scaling efficiency.
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"""
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communication_overhead = self._calculate_communication_overhead(data_size, num_gpus)
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compute_scaling = min(num_gpus, data_size / 1000) # Simplified scaling model
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analysis = {
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'data_size': data_size,
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'num_gpus': num_gpus,
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'communication_overhead': communication_overhead,
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'compute_scaling': compute_scaling,
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'scaling_efficiency': compute_scaling / num_gpus,
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'bottleneck_type': 'communication' if communication_overhead > 0.3 else 'compute',
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'optimization_strategies': self._get_multi_gpu_optimizations(communication_overhead)
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}
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self.profile_results['multi_gpu'] = analysis
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return analysis
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def generate_optimization_report(self) -> str:
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"""Generate comprehensive optimization report with recommendations."""
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report = ["🚀 Kernel Optimization Analysis Report", "=" * 50, ""]
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for analysis_type, results in self.profile_results.items():
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report.append(f"📊 {analysis_type.replace('_', ' ').title()} Analysis:")
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report.append("-" * 30)
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for key, value in results.items():
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if isinstance(value, float):
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report.append(f" {key}: {value:.3f}")
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elif isinstance(value, list):
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report.append(f" {key}: {', '.join(map(str, value))}")
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else:
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report.append(f" {key}: {value}")
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report.append("")
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# Add optimization recommendations
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report.append("🎯 Optimization Recommendations:")
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report.append("-" * 30)
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for rec in self.optimization_recommendations:
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report.append(f" • {rec}")
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return "\n".join(report)
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# Helper methods
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def _identify_bottlenecks(self, bandwidth_gb_s: float, utilization: float) -> str:
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"""Identify performance bottlenecks."""
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if bandwidth_gb_s < 100:
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return "Memory bandwidth limited"
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elif utilization < 0.5:
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return "Compute utilization limited"
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else:
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return "Well balanced"
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def _calculate_memory_transactions(self, shape: Tuple[int, ...], efficiency: float) -> int:
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"""Calculate memory transaction count."""
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total_elements = np.prod(shape)
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return int(total_elements / (32 * efficiency)) # 32 threads per warp
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def _generate_divergence_optimizations(self, divergence_ratio: float) -> List[str]:
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"""Generate warp divergence optimization suggestions."""
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suggestions = []
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if divergence_ratio > 0.3:
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suggestions.append("Reduce conditional operations in inner loops")
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suggestions.append("Use predicated execution instead of branching")
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if divergence_ratio > 0.5:
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suggestions.append("Restructure algorithm to minimize thread divergence")
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return suggestions
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def _estimate_bank_conflicts(self, data_size: int) -> float:
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"""Estimate shared memory bank conflicts."""
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# Simplified model - assumes some degree of bank conflicts
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return min(0.5, data_size / (32 * 4)) # 32 banks, 4 bytes per bank
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def _identify_shared_memory_optimizations(self, size: int, reuse: float) -> List[str]:
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"""Identify shared memory optimization opportunities."""
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optimizations = []
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if reuse > 2.0:
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optimizations.append("High reuse factor - shared memory beneficial")
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if size < 16384: # 16KB
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optimizations.append("Data fits in shared memory - implement tiling")
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return optimizations
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def _get_tensor_core_requirements(self) -> List[str]:
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"""Get tensor core optimization requirements."""
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return [
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"Use mixed precision (float16/bfloat16)",
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"Ensure matrix dimensions are multiples of 8",
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"Use proper memory layout (NHWC for convolutions)"
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]
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def _sequence_contains_pattern(self, sequence: List[str], pattern: List[str]) -> bool:
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"""Check if operation sequence contains fusable pattern."""
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for i in range(len(sequence) - len(pattern) + 1):
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if sequence[i:i+len(pattern)] == pattern:
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return True
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return False
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def _calculate_communication_overhead(self, data_size: int, num_gpus: int) -> float:
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"""Calculate multi-GPU communication overhead."""
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# Simplified model based on data size and GPU count
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return min(0.8, (data_size / 1000) / num_gpus + 0.1)
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def _get_multi_gpu_optimizations(self, overhead: float) -> List[str]:
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"""Get multi-GPU optimization strategies."""
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strategies = []
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if overhead > 0.3:
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strategies.append("Implement gradient compression")
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strategies.append("Use asynchronous communication")
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if overhead > 0.5:
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strategies.append("Increase batch size to amortize communication")
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return strategies
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# %% nbgrader={"grade": false, "grade_id": "test-kernel-profiler", "locked": false, "schema_version": 3, "solution": false, "task": false}
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### 🧪 Unit Test: Kernel Optimization Profiler
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def test_unit_kernel_optimization_profiler():
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"""Unit test for the kernel optimization profiler."""
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print("🔬 Unit Test: Kernel Optimization Profiler...")
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# Create profiler instance
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profiler = KernelOptimizationProfiler()
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# Test CUDA kernel analysis
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x = Tensor(np.random.randn(1000))
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cuda_analysis = profiler.analyze_cuda_kernel_performance(vectorized_relu, x, iterations=10)
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assert 'avg_execution_time_us' in cuda_analysis
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assert 'memory_bandwidth_gb_s' in cuda_analysis
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assert 'compute_utilization' in cuda_analysis
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print("✅ CUDA kernel analysis works")
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# Test memory coalescing analysis
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memory_analysis = profiler.analyze_memory_coalescing('row_major', (1024, 1024))
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assert memory_analysis['coalescing_efficiency'] > 0.9
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assert 'optimization_potential' in memory_analysis
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print("✅ Memory coalescing analysis works")
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# Test warp divergence analysis
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warp_analysis = profiler.analyze_warp_divergence(100, 1000)
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assert warp_analysis['divergence_ratio'] == 0.1
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assert 'warp_efficiency' in warp_analysis
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print("✅ Warp divergence analysis works")
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# Test shared memory analysis
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shared_analysis = profiler.analyze_shared_memory_usage(16384, 3.0)
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assert 'performance_gain' in shared_analysis
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assert shared_analysis['reuse_factor'] == 3.0
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print("✅ Shared memory analysis works")
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# Test tensor core analysis
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tensor_analysis = profiler.analyze_tensor_core_utilization('matmul', ['float16'])
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assert tensor_analysis['tensor_core_compatible'] == True
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assert tensor_analysis['theoretical_speedup'] > 1.0
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print("✅ Tensor core analysis works")
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# Test kernel fusion analysis
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fusion_analysis = profiler.analyze_kernel_fusion_opportunities(['matmul', 'relu', 'add'])
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assert len(fusion_analysis['fusion_opportunities']) > 0
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assert 'performance_improvement' in fusion_analysis
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print("✅ Kernel fusion analysis works")
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# Test multi-GPU analysis
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gpu_analysis = profiler.analyze_multi_gpu_scaling(10000, 4)
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assert gpu_analysis['num_gpus'] == 4
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assert 'scaling_efficiency' in gpu_analysis
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print("✅ Multi-GPU analysis works")
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# Test report generation
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report = profiler.generate_optimization_report()
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assert "Kernel Optimization Analysis Report" in report
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assert len(report) > 100 # Should be a substantial report
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print("✅ Optimization report generation works")
|
||||
|
||||
print("📈 Progress: Kernel Optimization Profiler ✓")
|
||||
|
||||
# Run the test
|
||||
test_unit_kernel_optimization_profiler()
|
||||
|
||||
# %%
|
||||
def test_module_kernel_sequential_model():
|
||||
"""
|
||||
@@ -1435,4 +1887,76 @@ Your implementations mirror production systems:
|
||||
4. **Move to Module 14**: Add benchmarking for evaluation!
|
||||
|
||||
**Ready for benchmarking?** Your custom kernels are now ready for real-world deployment!
|
||||
|
||||
## 🤔 ML Systems Thinking Questions
|
||||
|
||||
### GPU Architecture and Parallelism
|
||||
|
||||
**How does GPU architecture influence kernel design decisions?**
|
||||
Consider the massive parallelism of modern GPUs (1000s of cores) versus CPUs (10s of cores). How would you design matrix multiplication kernels differently for each architecture? What are the trade-offs between thread-level parallelism and instruction-level parallelism?
|
||||
|
||||
**Why do memory access patterns matter more on GPUs than CPUs?**
|
||||
Think about how GPU memory hierarchy (global memory, shared memory, registers) differs from CPU caches. How does memory coalescing affect bandwidth utilization, and why do random access patterns cause such dramatic performance degradation on GPUs?
|
||||
|
||||
**How do you handle load balancing across thousands of GPU threads?**
|
||||
When processing variable-sized data or irregular computations, how do you ensure all GPU cores stay busy? What strategies exist for handling workload imbalances, and how do frameworks like PyTorch handle dynamic shapes efficiently?
|
||||
|
||||
**What role do GPU warps play in kernel optimization?**
|
||||
NVIDIA GPUs execute threads in groups of 32 (warps). How does this affect branching, memory access, and algorithm design? Why is warp divergence such a critical performance consideration, and how do you design algorithms to minimize it?
|
||||
|
||||
### Custom CUDA Kernel Development
|
||||
|
||||
**When should you write custom CUDA kernels versus using library functions?**
|
||||
Given that libraries like cuDNN and cuBLAS are highly optimized, when does it make sense to write custom kernels? Consider scenarios like novel layer types, fused operations, or hardware-specific optimizations.
|
||||
|
||||
**How do you optimize CUDA kernels for different GPU generations?**
|
||||
GPU architectures evolve rapidly (Pascal → Volta → Ampere → Hopper). How do optimization strategies change across generations? What are the implications of new features like tensor cores, multi-instance GPU, and transformer engines?
|
||||
|
||||
**What's the development workflow for production CUDA kernels?**
|
||||
Consider the entire pipeline from prototype to production: profiling bottlenecks, writing initial kernels, optimization iterations, testing across hardware, and deployment. How do companies like OpenAI and Google manage kernel development at scale?
|
||||
|
||||
**How do you ensure numerical stability in custom kernels?**
|
||||
Custom kernels often involve low-level optimizations that can affect numerical precision. How do you balance performance with accuracy? What testing strategies ensure kernels produce correct results across different data ranges and edge cases?
|
||||
|
||||
### Triton and Kernel Languages
|
||||
|
||||
**How does Triton compare to CUDA for kernel development?**
|
||||
Triton promises Python-like syntax while generating efficient GPU code. What are the trade-offs between ease of development and performance control? When would you choose Triton over CUDA or vice versa?
|
||||
|
||||
**What role do domain-specific languages play in kernel optimization?**
|
||||
Beyond CUDA and Triton, consider languages like OpenCL, HIP, and emerging alternatives. How do these languages abstract hardware differences while maintaining performance? What's the future of cross-platform kernel development?
|
||||
|
||||
**How do JIT compilation and auto-tuning affect kernel performance?**
|
||||
Modern frameworks use just-in-time compilation to optimize kernels for specific inputs and hardware. How does this compare to static optimization? What are the implications for deployment, cold start times, and reproducibility?
|
||||
|
||||
**What are the challenges of kernel portability across hardware vendors?**
|
||||
With AMD GPUs, Intel GPUs, and custom accelerators becoming more common, how do you write kernels that perform well across different architectures? What abstraction layers exist, and what are their performance costs?
|
||||
|
||||
### Hardware-Specific Optimizations
|
||||
|
||||
**How do you optimize kernels for different memory hierarchies?**
|
||||
Consider the differences between GPU global memory, shared memory, and registers versus CPU caches. How do you design algorithms that effectively use each level of the hierarchy? What happens when your working set exceeds cache capacity?
|
||||
|
||||
**What optimization strategies work best for tensor operations?**
|
||||
Tensor cores on modern GPUs can dramatically accelerate mixed-precision operations. How do you restructure algorithms to take advantage of these specialized units? What are the constraints on data layout, precision, and problem sizes?
|
||||
|
||||
**How do you handle precision trade-offs in optimized kernels?**
|
||||
Production systems often use int8, fp16, or bfloat16 for performance. How do you maintain model accuracy while using reduced precision? What accumulation strategies prevent numerical issues in long computations?
|
||||
|
||||
**What role does compiler optimization play in kernel performance?**
|
||||
Modern GPU compilers perform sophisticated optimizations like loop unrolling, memory access optimization, and instruction scheduling. How do you write kernel code that works well with these optimizations? When do you need to use inline assembly or intrinsics?
|
||||
|
||||
### Production GPU Clusters
|
||||
|
||||
**How do you scale kernel optimizations across multi-GPU systems?**
|
||||
Single-node multi-GPU systems require coordination of memory transfers, computation scheduling, and synchronization. How do you design kernels that scale efficiently across 8-16 GPUs? What are the bottlenecks in multi-GPU scaling?
|
||||
|
||||
**What are the challenges of distributed training with custom kernels?**
|
||||
When scaling to hundreds or thousands of GPUs across multiple nodes, network communication becomes critical. How do custom kernels interact with distributed training frameworks? What optimizations exist for gradient synchronization and parameter updates?
|
||||
|
||||
**How do you manage kernel deployment in production clusters?**
|
||||
Production ML systems need to handle hardware failures, software updates, and varying workloads. How do you deploy and manage custom kernels across heterogeneous clusters? What strategies exist for A/B testing kernel optimizations safely?
|
||||
|
||||
**What monitoring and debugging tools exist for production GPU workloads?**
|
||||
When kernels behave unexpectedly in production, how do you diagnose issues? What metrics matter for kernel performance monitoring? How do you correlate kernel performance with higher-level model metrics like accuracy and throughput?
|
||||
"""
|
||||
Reference in New Issue
Block a user