From 376bea8b40bbf6495410d16c2e4956abb640b536 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Sur=C3=BD?= Date: Tue, 4 Sep 2018 10:16:02 +0200 Subject: [PATCH] Cleanup the custom atomic defines from Windows and remove empty atomic_test.c --- lib/isc/tests/Atffile | 1 - lib/isc/tests/Kyuafile | 1 - lib/isc/tests/Makefile.in | 8 +- lib/isc/tests/atomic_test.c | 354 ------------------------------------ util/copyrights | 1 - 5 files changed, 2 insertions(+), 363 deletions(-) delete mode 100644 lib/isc/tests/atomic_test.c diff --git a/lib/isc/tests/Atffile b/lib/isc/tests/Atffile index 335b1dbb64..742cad3a6b 100644 --- a/lib/isc/tests/Atffile +++ b/lib/isc/tests/Atffile @@ -3,7 +3,6 @@ Content-Type: application/X-atf-atffile; version="1" prop: test-suite = bind9 tp: aes_test -tp: atomic_test tp: buffer_test tp: counter_test tp: errno_test diff --git a/lib/isc/tests/Kyuafile b/lib/isc/tests/Kyuafile index b1005e7e9b..401cbe5d1d 100644 --- a/lib/isc/tests/Kyuafile +++ b/lib/isc/tests/Kyuafile @@ -2,7 +2,6 @@ syntax(2) test_suite('bind9') atf_test_program{name='aes_test'} -atf_test_program{name='atomic_test'} atf_test_program{name='buffer_test'} atf_test_program{name='counter_test'} atf_test_program{name='errno_test'} diff --git a/lib/isc/tests/Makefile.in b/lib/isc/tests/Makefile.in index fe570b56f8..4f585af9b3 100644 --- a/lib/isc/tests/Makefile.in +++ b/lib/isc/tests/Makefile.in @@ -31,7 +31,7 @@ CMOCKA_CFLAGS = @CMOCKA_CFLAGS@ CMOCKA_LIBS = @CMOCKA_LIBS@ OBJS = isctest.@O@ -SRCS = isctest.c aes_test.c atomic_test.c buffer_test.c \ +SRCS = isctest.c aes_test.c buffer_test.c \ counter_test.c errno_test.c file_test.c hash_test.c \ heap_test.c ht_test.c lex_test.c \ mem_test.c netaddr_test.c parse_test.c pool_test.c \ @@ -41,7 +41,7 @@ SRCS = isctest.c aes_test.c atomic_test.c buffer_test.c \ taskpool_test.c time_test.c timer_test.c SUBDIRS = -TARGETS = aes_test@EXEEXT@ atomic_test@EXEEXT@ buffer_test@EXEEXT@ \ +TARGETS = aes_test@EXEEXT@ buffer_test@EXEEXT@ \ counter_test@EXEEXT@ errno_test@EXEEXT@ file_test@EXEEXT@ \ hash_test@EXEEXT@ heap_test@EXEEXT@ ht_test@EXEEXT@ \ lex_test@EXEEXT@ mem_test@EXEEXT@ \ @@ -54,10 +54,6 @@ TARGETS = aes_test@EXEEXT@ atomic_test@EXEEXT@ buffer_test@EXEEXT@ \ @BIND9_MAKE_RULES@ -atomic_test@EXEEXT@: atomic_test.@O@ isctest.@O@ ${ISCDEPLIBS} - ${LIBTOOL_MODE_LINK} ${PURIFY} ${CC} ${CFLAGS} ${LDFLAGS} -o $@ \ - atomic_test.@O@ isctest.@O@ ${ISCLIBS} ${LIBS} - aes_test@EXEEXT@: aes_test.@O@ ${ISCDEPLIBS} ${LIBTOOL_MODE_LINK} ${PURIFY} ${CC} ${CFLAGS} ${LDFLAGS} -o $@ \ aes_test.@O@ ${ISCLIBS} ${LIBS} diff --git a/lib/isc/tests/atomic_test.c b/lib/isc/tests/atomic_test.c deleted file mode 100644 index 801301049d..0000000000 --- a/lib/isc/tests/atomic_test.c +++ /dev/null @@ -1,354 +0,0 @@ -/* - * Copyright (C) Internet Systems Consortium, Inc. ("ISC") - * - * This Source Code Form is subject to the terms of the Mozilla Public - * License, v. 2.0. If a copy of the MPL was not distributed with this - * file, You can obtain one at http://mozilla.org/MPL/2.0/. - * - * See the COPYRIGHT file distributed with this work for additional - * information regarding copyright ownership. - */ - -#include - -#include -#include - -#include - -#include -#include -#include - -#include "isctest.h" - -#define TASKS 32 -#define ITERATIONS 1000 -#define COUNTS_PER_ITERATION 1000 -#define INCREMENT_64 (int64_t)0x0000000010000000 -#define EXPECTED_COUNT_32 (TASKS * ITERATIONS * COUNTS_PER_ITERATION) -#define EXPECTED_COUNT_64 (TASKS * ITERATIONS * COUNTS_PER_ITERATION * INCREMENT_64) - -typedef struct { - uint32_t iteration; -} counter_t; - -counter_t counters[TASKS]; - -#if defined(ISC_PLATFORM_HAVEXADD) -static int32_t counter_32; - -static void -do_xadd(isc_task_t *task, isc_event_t *ev) { - counter_t *state = (counter_t *)ev->ev_arg; - int i; - - for (i = 0 ; i < COUNTS_PER_ITERATION ; i++) { - isc_atomic_xadd(&counter_32, 1); - } - - state->iteration++; - if (state->iteration < ITERATIONS) { - isc_task_send(task, &ev); - } else { - isc_event_free(&ev); - } -} - -ATF_TC(atomic_xadd); -ATF_TC_HEAD(atomic_xadd, tc) { - atf_tc_set_md_var(tc, "descr", "atomic XADD"); -} -ATF_TC_BODY(atomic_xadd, tc) { - isc_result_t result; - isc_task_t *tasks[TASKS]; - isc_event_t *event = NULL; - int i; - - UNUSED(tc); - - result = isc_test_begin(NULL, true, 0); - ATF_REQUIRE_EQ(result, ISC_R_SUCCESS); - - memset(counters, 0, sizeof(counters)); - counter_32 = 0; - - /* - * Create our tasks, and allocate an event to get the counters going. - */ - for (i = 0 ; i < TASKS ; i++) { - tasks[i] = NULL; - ATF_REQUIRE_EQ(isc_task_create(taskmgr, 0, &tasks[i]), - ISC_R_SUCCESS); - event = isc_event_allocate(mctx, NULL, 1000, do_xadd, - &counters[i], - sizeof(struct isc_event)); - ATF_REQUIRE(event != NULL); - isc_task_sendanddetach(&tasks[i], &event); - } - - isc_test_end(); - - printf("32-bit counter %d, expected %d\n", - counter_32, EXPECTED_COUNT_32); - - ATF_CHECK_EQ(counter_32, EXPECTED_COUNT_32); - counter_32 = 0; -} -#endif - -#if defined(ISC_PLATFORM_HAVEXADDQ) -static int64_t counter_64; - -static void -do_xaddq(isc_task_t *task, isc_event_t *ev) { - counter_t *state = (counter_t *)ev->ev_arg; - int i; - - for (i = 0 ; i < COUNTS_PER_ITERATION ; i++) { - isc_atomic_xaddq(&counter_64, INCREMENT_64); - } - - state->iteration++; - if (state->iteration < ITERATIONS) { - isc_task_send(task, &ev); - } else { - isc_event_free(&ev); - } -} - -ATF_TC(atomic_xaddq); -ATF_TC_HEAD(atomic_xaddq, tc) { - atf_tc_set_md_var(tc, "descr", "atomic XADDQ"); -} -ATF_TC_BODY(atomic_xaddq, tc) { - isc_result_t result; - isc_task_t *tasks[TASKS]; - isc_event_t *event = NULL; - int i; - - UNUSED(tc); - - result = isc_test_begin(NULL, true, 0); - ATF_REQUIRE_EQ(result, ISC_R_SUCCESS); - - memset(counters, 0, sizeof(counters)); - counter_64 = 0; - - /* - * Create our tasks, and allocate an event to get the counters going. - */ - for (i = 0 ; i < TASKS ; i++) { - tasks[i] = NULL; - ATF_REQUIRE_EQ(isc_task_create(taskmgr, 0, &tasks[i]), - ISC_R_SUCCESS); - event = isc_event_allocate(mctx, NULL, 1000, do_xaddq, - &counters[i], - sizeof(struct isc_event)); - ATF_REQUIRE(event != NULL); - isc_task_sendanddetach(&tasks[i], &event); - } - - isc_test_end(); - - printf("64-bit counter %" PRId64 ", " - "expected %" PRId64 "\n", - counter_64, EXPECTED_COUNT_64); - - ATF_CHECK_EQ(counter_64, EXPECTED_COUNT_64); - counter_32 = 0; -} -#endif - -#if defined(ISC_PLATFORM_HAVEATOMICSTORE) -static int32_t store_32; - -static void -do_store(isc_task_t *task, isc_event_t *ev) { - counter_t *state = (counter_t *)ev->ev_arg; - int i; - uint32_t r; - uint32_t val; - - r = random() % 256; - val = (r << 24) | (r << 16) | (r << 8) | r; - - for (i = 0 ; i < COUNTS_PER_ITERATION ; i++) { - isc_atomic_store(&store_32, val); - } - - state->iteration++; - if (state->iteration < ITERATIONS) { - isc_task_send(task, &ev); - } else { - isc_event_free(&ev); - } -} - -ATF_TC(atomic_store); -ATF_TC_HEAD(atomic_store, tc) { - atf_tc_set_md_var(tc, "descr", "atomic STORE"); -} -ATF_TC_BODY(atomic_store, tc) { - isc_result_t result; - isc_task_t *tasks[TASKS]; - isc_event_t *event = NULL; - uint32_t val; - uint32_t r; - int i; - - UNUSED(tc); - - result = isc_test_begin(NULL, true, 0); - ATF_REQUIRE_EQ(result, ISC_R_SUCCESS); - - memset(counters, 0, sizeof(counters)); - store_32 = 0; - - /* - * Create our tasks, and allocate an event to get the counters - * going. - */ - for (i = 0 ; i < TASKS ; i++) { - tasks[i] = NULL; - ATF_REQUIRE_EQ(isc_task_create(taskmgr, 0, &tasks[i]), - ISC_R_SUCCESS); - event = isc_event_allocate(mctx, NULL, 1000, do_store, - &counters[i], - sizeof(struct isc_event)); - ATF_REQUIRE(event != NULL); - isc_task_sendanddetach(&tasks[i], &event); - } - - isc_test_end(); - - r = store_32 & 0xff; - val = (r << 24) | (r << 16) | (r << 8) | r; - - printf("32-bit store 0x%x, expected 0x%x\n", - (uint32_t) store_32, val); - - ATF_CHECK_EQ((uint32_t) store_32, val); - store_32 = 0; -} -#endif - -#if defined(ISC_PLATFORM_HAVEATOMICSTOREQ) -static int64_t store_64; - -static void -do_storeq(isc_task_t *task, isc_event_t *ev) { - counter_t *state = (counter_t *)ev->ev_arg; - int i; - uint8_t r; - uint64_t val; - - r = random() % 256; - val = (((uint64_t) r << 24) | - ((uint64_t) r << 16) | - ((uint64_t) r << 8) | - (uint64_t) r); - val |= ((uint64_t) val << 32); - - for (i = 0 ; i < COUNTS_PER_ITERATION ; i++) { - isc_atomic_storeq(&store_64, val); - } - - state->iteration++; - if (state->iteration < ITERATIONS) { - isc_task_send(task, &ev); - } else { - isc_event_free(&ev); - } -} - -ATF_TC(atomic_storeq); -ATF_TC_HEAD(atomic_storeq, tc) { - atf_tc_set_md_var(tc, "descr", "atomic STOREQ"); -} -ATF_TC_BODY(atomic_storeq, tc) { - isc_result_t result; - isc_task_t *tasks[TASKS]; - isc_event_t *event = NULL; - uint64_t val; - uint32_t r; - int i; - - UNUSED(tc); - - result = isc_test_begin(NULL, true, 0); - ATF_REQUIRE_EQ(result, ISC_R_SUCCESS); - - memset(counters, 0, sizeof(counters)); - store_64 = 0; - - /* - * Create our tasks, and allocate an event to get the counters - * going. - */ - for (i = 0 ; i < TASKS ; i++) { - tasks[i] = NULL; - ATF_REQUIRE_EQ(isc_task_create(taskmgr, 0, &tasks[i]), - ISC_R_SUCCESS); - event = isc_event_allocate(mctx, NULL, 1000, do_storeq, - &counters[i], - sizeof(struct isc_event)); - ATF_REQUIRE(event != NULL); - isc_task_sendanddetach(&tasks[i], &event); - } - - isc_test_end(); - - r = store_64 & 0xff; - val = (((uint64_t) r << 24) | - ((uint64_t) r << 16) | - ((uint64_t) r << 8) | - (uint64_t) r); - val |= ((uint64_t) val << 32); - - printf("64-bit store 0x%" PRIx64 ", " - "expected 0x%" PRIx64 "\n", - (uint64_t) store_64, val); - - ATF_CHECK_EQ((uint64_t) store_64, val); - store_64 = 0; -} -#endif - -#if !defined(ISC_PLATFORM_HAVEXADD) && \ - !defined(ISC_PLATFORM_HAVEXADDQ) && \ - !defined(ISC_PLATFORM_HAVEATOMICSTOREQ) -ATF_TC(untested); -ATF_TC_HEAD(untested, tc) { - atf_tc_set_md_var(tc, "descr", "skipping aes test"); -} -ATF_TC_BODY(untested, tc) { - UNUSED(tc); - atf_tc_skip("AES not available"); -} -#endif /* !HAVEXADD, !HAVEXADDQ, !HAVEATOMICSTOREQ */ - -/* - * Main - */ -ATF_TP_ADD_TCS(tp) { -#if defined(ISC_PLATFORM_HAVEXADD) - ATF_TP_ADD_TC(tp, atomic_xadd); -#endif -#if defined(ISC_PLATFORM_HAVEXADDQ) - ATF_TP_ADD_TC(tp, atomic_xaddq); -#endif -#ifdef ISC_PLATFORM_HAVEATOMICSTORE - ATF_TP_ADD_TC(tp, atomic_store); -#endif -#if defined(ISC_PLATFORM_HAVEATOMICSTOREQ) - ATF_TP_ADD_TC(tp, atomic_storeq); -#endif -#if !defined(ISC_PLATFORM_HAVEXADD) && \ - !defined(ISC_PLATFORM_HAVEXADDQ) && \ - !defined(ISC_PLATFORM_HAVEATOMICSTOREQ) - ATF_TP_ADD_TC(tp, untested); -#endif - - return (atf_no_error()); -} diff --git a/util/copyrights b/util/copyrights index 4b2dfd62d1..6b74dc659c 100644 --- a/util/copyrights +++ b/util/copyrights @@ -3465,7 +3465,6 @@ ./lib/isc/tests/Atffile X 2011,2017,2018 ./lib/isc/tests/Kyuafile X 2017,2018 ./lib/isc/tests/aes_test.c C 2014,2016,2018 -./lib/isc/tests/atomic_test.c C 2018 ./lib/isc/tests/buffer_test.c C 2014,2015,2016,2017,2018 ./lib/isc/tests/counter_test.c C 2014,2016,2018 ./lib/isc/tests/errno_test.c C 2016,2018